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Read out integrated circuits (ROICs) which have been implemented with startling success for

Si-SPAD arrays urgently need to be tailored for our portfolio of emerging longer wavelength detectors.
Strategies include hybridization of focal plane arrays with CMOS into integrated assemblies, in tandem with novel integrated readout such as superconducting digital or analogue electronics. WP4 is led by Robert Henderson and feeds into WP1, 2 and 3, and forms a key part of WP6.

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